[PATCH 1/2] tests/cpu: print the RISC-V Vector length
--- libavutil/tests/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c index 9e45527408..1eb3055ff0 100644 --- a/libavutil/tests/cpu.c +++ b/libavutil/tests/cpu.c @@ -25,6 +25,8 @@ #if ARCH_AARCH64 #include "libavutil/aarch64/cpu.h" +#elif ARCH_RISCV +#include "libavutil/riscv/cpu.h" #endif #if HAVE_UNISTD_H @@ -170,6 +172,12 @@ int main(int argc, char **argv) #if ARCH_AARCH64 && HAVE_SVE if (cpu_flags_raw & AV_CPU_FLAG_SVE) printf("sve_vector_length = %d\n", 8 * ff_aarch64_sve_length()); +#elif ARCH_RISCV && HAVE_RVV + if (cpu_flags_raw & AV_CPU_FLAG_RVV_I32) { + size_t bytes = ff_get_rv_vlenb(); + + printf("rv_vlenb = %zu (%zu bits)\n", bytes, 8 * bytes); + } #endif return 0; -- 2.45.2
--- tests/checkasm/checkasm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index fb307af0ae..f30c53cec2 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -96,6 +96,8 @@ #if ARCH_AARCH64 #include "libavutil/aarch64/cpu.h" +#elif ARCH_RISCV +#include "libavutil/riscv/cpu.h" #endif #if ARCH_ARM && HAVE_ARMV5TE_EXTERNAL @@ -993,6 +995,10 @@ int main(int argc, char *argv[]) if (have_sve(av_get_cpu_flags())) snprintf(arch_info_buf, sizeof(arch_info_buf), "SVE %d bits, ", 8 * ff_aarch64_sve_length()); +#elif ARCH_RISCV && HAVE_RVV + if (av_get_cpu_flags() & AV_CPU_FLAG_RVV_I32) + snprintf(arch_info_buf, sizeof (arch_info_buf), + "%zu-bit vectors, ", 8 * ff_get_rv_vlenb()); #endif fprintf(stderr, "checkasm: %susing random seed %u\n", arch_info_buf, seed); av_lfg_init(&checkasm_lfg, seed); -- 2.45.2
On Sat, 16 Nov 2024, Rémi Denis-Courmont wrote:
--- tests/checkasm/checkasm.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index fb307af0ae..f30c53cec2 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -96,6 +96,8 @@
#if ARCH_AARCH64 #include "libavutil/aarch64/cpu.h" +#elif ARCH_RISCV +#include "libavutil/riscv/cpu.h" #endif
#if ARCH_ARM && HAVE_ARMV5TE_EXTERNAL @@ -993,6 +995,10 @@ int main(int argc, char *argv[]) if (have_sve(av_get_cpu_flags())) snprintf(arch_info_buf, sizeof(arch_info_buf), "SVE %d bits, ", 8 * ff_aarch64_sve_length()); +#elif ARCH_RISCV && HAVE_RVV + if (av_get_cpu_flags() & AV_CPU_FLAG_RVV_I32) + snprintf(arch_info_buf, sizeof (arch_info_buf), + "%zu-bit vectors, ", 8 * ff_get_rv_vlenb()); #endif fprintf(stderr, "checkasm: %susing random seed %u\n", arch_info_buf, seed); av_lfg_init(&checkasm_lfg, seed); -- 2.45.2
These two patches LGTM. // Martin
participants (2)
-
Martin Storsjö -
Rémi Denis-Courmont