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00027 #include "libavutil/x86_cpu.h"
00028 #include "libavcodec/dsputil.h"
00029 #include "dsputil_mmx.h"
00030
00031 #define OP_PUT(S,D)
00032 #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"
00033
00035 #define NORMALIZE_MMX(SHIFT) \
00036 "paddw %%mm7, %%mm3 \n\t" \
00037 "paddw %%mm7, %%mm4 \n\t" \
00038 "psraw "SHIFT", %%mm3 \n\t" \
00039 "psraw "SHIFT", %%mm4 \n\t"
00040
00041 #define TRANSFER_DO_PACK(OP) \
00042 "packuswb %%mm4, %%mm3 \n\t" \
00043 OP((%2), %%mm3) \
00044 "movq %%mm3, (%2) \n\t"
00045
00046 #define TRANSFER_DONT_PACK(OP) \
00047 OP(0(%2), %%mm3) \
00048 OP(8(%2), %%mm4) \
00049 "movq %%mm3, 0(%2) \n\t" \
00050 "movq %%mm4, 8(%2) \n\t"
00051
00053 #define DO_UNPACK(reg) "punpcklbw %%mm0, " reg "\n\t"
00054 #define DONT_UNPACK(reg)
00055
00057 #define LOAD_ROUNDER_MMX(ROUND) \
00058 "movd "ROUND", %%mm7 \n\t" \
00059 "punpcklwd %%mm7, %%mm7 \n\t" \
00060 "punpckldq %%mm7, %%mm7 \n\t"
00061
00062 #define SHIFT2_LINE(OFF, R0,R1,R2,R3) \
00063 "paddw %%mm"#R2", %%mm"#R1" \n\t" \
00064 "movd (%0,%3), %%mm"#R0" \n\t" \
00065 "pmullw %%mm6, %%mm"#R1" \n\t" \
00066 "punpcklbw %%mm0, %%mm"#R0" \n\t" \
00067 "movd (%0,%2), %%mm"#R3" \n\t" \
00068 "psubw %%mm"#R0", %%mm"#R1" \n\t" \
00069 "punpcklbw %%mm0, %%mm"#R3" \n\t" \
00070 "paddw %%mm7, %%mm"#R1" \n\t" \
00071 "psubw %%mm"#R3", %%mm"#R1" \n\t" \
00072 "psraw %4, %%mm"#R1" \n\t" \
00073 "movq %%mm"#R1", "#OFF"(%1) \n\t" \
00074 "add %2, %0 \n\t"
00075
00076 DECLARE_ALIGNED(16, const uint64_t, ff_pw_9) = 0x0009000900090009ULL;
00077
00079 static void vc1_put_ver_16b_shift2_mmx(int16_t *dst,
00080 const uint8_t *src, x86_reg stride,
00081 int rnd, int64_t shift)
00082 {
00083 __asm__ volatile(
00084 "mov $3, %%"REG_c" \n\t"
00085 LOAD_ROUNDER_MMX("%5")
00086 "movq "MANGLE(ff_pw_9)", %%mm6 \n\t"
00087 "1: \n\t"
00088 "movd (%0), %%mm2 \n\t"
00089 "add %2, %0 \n\t"
00090 "movd (%0), %%mm3 \n\t"
00091 "punpcklbw %%mm0, %%mm2 \n\t"
00092 "punpcklbw %%mm0, %%mm3 \n\t"
00093 SHIFT2_LINE( 0, 1, 2, 3, 4)
00094 SHIFT2_LINE( 24, 2, 3, 4, 1)
00095 SHIFT2_LINE( 48, 3, 4, 1, 2)
00096 SHIFT2_LINE( 72, 4, 1, 2, 3)
00097 SHIFT2_LINE( 96, 1, 2, 3, 4)
00098 SHIFT2_LINE(120, 2, 3, 4, 1)
00099 SHIFT2_LINE(144, 3, 4, 1, 2)
00100 SHIFT2_LINE(168, 4, 1, 2, 3)
00101 "sub %6, %0 \n\t"
00102 "add $8, %1 \n\t"
00103 "dec %%"REG_c" \n\t"
00104 "jnz 1b \n\t"
00105 : "+r"(src), "+r"(dst)
00106 : "r"(stride), "r"(-2*stride),
00107 "m"(shift), "m"(rnd), "r"(9*stride-4)
00108 : "%"REG_c, "memory"
00109 );
00110 }
00111
00116 #define VC1_HOR_16b_SHIFT2(OP, OPNAME)\
00117 static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\
00118 const int16_t *src, int rnd)\
00119 {\
00120 int h = 8;\
00121 \
00122 src -= 1;\
00123 rnd -= (-1+9+9-1)*1024; \
00124 __asm__ volatile(\
00125 LOAD_ROUNDER_MMX("%4")\
00126 "movq "MANGLE(ff_pw_128)", %%mm6\n\t"\
00127 "movq "MANGLE(ff_pw_9)", %%mm5 \n\t"\
00128 "1: \n\t"\
00129 "movq 2*0+0(%1), %%mm1 \n\t"\
00130 "movq 2*0+8(%1), %%mm2 \n\t"\
00131 "movq 2*1+0(%1), %%mm3 \n\t"\
00132 "movq 2*1+8(%1), %%mm4 \n\t"\
00133 "paddw 2*3+0(%1), %%mm1 \n\t"\
00134 "paddw 2*3+8(%1), %%mm2 \n\t"\
00135 "paddw 2*2+0(%1), %%mm3 \n\t"\
00136 "paddw 2*2+8(%1), %%mm4 \n\t"\
00137 "pmullw %%mm5, %%mm3 \n\t"\
00138 "pmullw %%mm5, %%mm4 \n\t"\
00139 "psubw %%mm1, %%mm3 \n\t"\
00140 "psubw %%mm2, %%mm4 \n\t"\
00141 NORMALIZE_MMX("$7")\
00142 \
00143 "paddw %%mm6, %%mm3 \n\t"\
00144 "paddw %%mm6, %%mm4 \n\t"\
00145 TRANSFER_DO_PACK(OP)\
00146 "add $24, %1 \n\t"\
00147 "add %3, %2 \n\t"\
00148 "decl %0 \n\t"\
00149 "jnz 1b \n\t"\
00150 : "+r"(h), "+r" (src), "+r" (dst)\
00151 : "r"(stride), "m"(rnd)\
00152 : "memory"\
00153 );\
00154 }
00155
00156 VC1_HOR_16b_SHIFT2(OP_PUT, put_)
00157 VC1_HOR_16b_SHIFT2(OP_AVG, avg_)
00158
00159
00164 #define VC1_SHIFT2(OP, OPNAME)\
00165 static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\
00166 x86_reg stride, int rnd, x86_reg offset)\
00167 {\
00168 rnd = 8-rnd;\
00169 __asm__ volatile(\
00170 "mov $8, %%"REG_c" \n\t"\
00171 LOAD_ROUNDER_MMX("%5")\
00172 "movq "MANGLE(ff_pw_9)", %%mm6\n\t"\
00173 "1: \n\t"\
00174 "movd 0(%0 ), %%mm3 \n\t"\
00175 "movd 4(%0 ), %%mm4 \n\t"\
00176 "movd 0(%0,%2), %%mm1 \n\t"\
00177 "movd 4(%0,%2), %%mm2 \n\t"\
00178 "add %2, %0 \n\t"\
00179 "punpcklbw %%mm0, %%mm3 \n\t"\
00180 "punpcklbw %%mm0, %%mm4 \n\t"\
00181 "punpcklbw %%mm0, %%mm1 \n\t"\
00182 "punpcklbw %%mm0, %%mm2 \n\t"\
00183 "paddw %%mm1, %%mm3 \n\t"\
00184 "paddw %%mm2, %%mm4 \n\t"\
00185 "movd 0(%0,%3), %%mm1 \n\t"\
00186 "movd 4(%0,%3), %%mm2 \n\t"\
00187 "pmullw %%mm6, %%mm3 \n\t" \
00188 "pmullw %%mm6, %%mm4 \n\t" \
00189 "punpcklbw %%mm0, %%mm1 \n\t"\
00190 "punpcklbw %%mm0, %%mm2 \n\t"\
00191 "psubw %%mm1, %%mm3 \n\t" \
00192 "psubw %%mm2, %%mm4 \n\t" \
00193 "movd 0(%0,%2), %%mm1 \n\t"\
00194 "movd 4(%0,%2), %%mm2 \n\t"\
00195 "punpcklbw %%mm0, %%mm1 \n\t"\
00196 "punpcklbw %%mm0, %%mm2 \n\t"\
00197 "psubw %%mm1, %%mm3 \n\t" \
00198 "psubw %%mm2, %%mm4 \n\t" \
00199 NORMALIZE_MMX("$4")\
00200 "packuswb %%mm4, %%mm3 \n\t"\
00201 OP((%1), %%mm3)\
00202 "movq %%mm3, (%1) \n\t"\
00203 "add %6, %0 \n\t"\
00204 "add %4, %1 \n\t"\
00205 "dec %%"REG_c" \n\t"\
00206 "jnz 1b \n\t"\
00207 : "+r"(src), "+r"(dst)\
00208 : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\
00209 "g"(stride-offset)\
00210 : "%"REG_c, "memory"\
00211 );\
00212 }
00213
00214 VC1_SHIFT2(OP_PUT, put_)
00215 VC1_SHIFT2(OP_AVG, avg_)
00216
00221 DECLARE_ASM_CONST(16, uint64_t, ff_pw_53) = 0x0035003500350035ULL;
00222 DECLARE_ASM_CONST(16, uint64_t, ff_pw_18) = 0x0012001200120012ULL;
00223
00234 #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4) \
00235 MOVQ "*0+"A1", %%mm1 \n\t" \
00236 MOVQ "*4+"A1", %%mm2 \n\t" \
00237 UNPACK("%%mm1") \
00238 UNPACK("%%mm2") \
00239 "pmullw "MANGLE(ff_pw_3)", %%mm1\n\t" \
00240 "pmullw "MANGLE(ff_pw_3)", %%mm2\n\t" \
00241 MOVQ "*0+"A2", %%mm3 \n\t" \
00242 MOVQ "*4+"A2", %%mm4 \n\t" \
00243 UNPACK("%%mm3") \
00244 UNPACK("%%mm4") \
00245 "pmullw %%mm6, %%mm3 \n\t" \
00246 "pmullw %%mm6, %%mm4 \n\t" \
00247 "psubw %%mm1, %%mm3 \n\t" \
00248 "psubw %%mm2, %%mm4 \n\t" \
00249 MOVQ "*0+"A4", %%mm1 \n\t" \
00250 MOVQ "*4+"A4", %%mm2 \n\t" \
00251 UNPACK("%%mm1") \
00252 UNPACK("%%mm2") \
00253 "psllw $2, %%mm1 \n\t" \
00254 "psllw $2, %%mm2 \n\t" \
00255 "psubw %%mm1, %%mm3 \n\t" \
00256 "psubw %%mm2, %%mm4 \n\t" \
00257 MOVQ "*0+"A3", %%mm1 \n\t" \
00258 MOVQ "*4+"A3", %%mm2 \n\t" \
00259 UNPACK("%%mm1") \
00260 UNPACK("%%mm2") \
00261 "pmullw %%mm5, %%mm1 \n\t" \
00262 "pmullw %%mm5, %%mm2 \n\t" \
00263 "paddw %%mm1, %%mm3 \n\t" \
00264 "paddw %%mm2, %%mm4 \n\t"
00265
00274 #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4) \
00275 static void \
00276 vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \
00277 x86_reg src_stride, \
00278 int rnd, int64_t shift) \
00279 { \
00280 int h = 8; \
00281 src -= src_stride; \
00282 __asm__ volatile( \
00283 LOAD_ROUNDER_MMX("%5") \
00284 "movq "MANGLE(ff_pw_53)", %%mm5\n\t" \
00285 "movq "MANGLE(ff_pw_18)", %%mm6\n\t" \
00286 ASMALIGN(3) \
00287 "1: \n\t" \
00288 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00289 NORMALIZE_MMX("%6") \
00290 TRANSFER_DONT_PACK(OP_PUT) \
00291 \
00292 "movd 8+"A1", %%mm1 \n\t" \
00293 DO_UNPACK("%%mm1") \
00294 "movq %%mm1, %%mm3 \n\t" \
00295 "paddw %%mm1, %%mm1 \n\t" \
00296 "paddw %%mm3, %%mm1 \n\t" \
00297 "movd 8+"A2", %%mm3 \n\t" \
00298 DO_UNPACK("%%mm3") \
00299 "pmullw %%mm6, %%mm3 \n\t" \
00300 "psubw %%mm1, %%mm3 \n\t" \
00301 "movd 8+"A3", %%mm1 \n\t" \
00302 DO_UNPACK("%%mm1") \
00303 "pmullw %%mm5, %%mm1 \n\t" \
00304 "paddw %%mm1, %%mm3 \n\t" \
00305 "movd 8+"A4", %%mm1 \n\t" \
00306 DO_UNPACK("%%mm1") \
00307 "psllw $2, %%mm1 \n\t" \
00308 "psubw %%mm1, %%mm3 \n\t" \
00309 "paddw %%mm7, %%mm3 \n\t" \
00310 "psraw %6, %%mm3 \n\t" \
00311 "movq %%mm3, 16(%2) \n\t" \
00312 "add %3, %1 \n\t" \
00313 "add $24, %2 \n\t" \
00314 "decl %0 \n\t" \
00315 "jnz 1b \n\t" \
00316 : "+r"(h), "+r" (src), "+r" (dst) \
00317 : "r"(src_stride), "r"(3*src_stride), \
00318 "m"(rnd), "m"(shift) \
00319 : "memory" \
00320 ); \
00321 }
00322
00330 #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00331 static void \
00332 OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \
00333 const int16_t *src, int rnd) \
00334 { \
00335 int h = 8; \
00336 src -= 1; \
00337 rnd -= (-4+58+13-3)*256; \
00338 __asm__ volatile( \
00339 LOAD_ROUNDER_MMX("%4") \
00340 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00341 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00342 ASMALIGN(3) \
00343 "1: \n\t" \
00344 MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4) \
00345 NORMALIZE_MMX("$7") \
00346 \
00347 "paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \
00348 "paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \
00349 TRANSFER_DO_PACK(OP) \
00350 "add $24, %1 \n\t" \
00351 "add %3, %2 \n\t" \
00352 "decl %0 \n\t" \
00353 "jnz 1b \n\t" \
00354 : "+r"(h), "+r" (src), "+r" (dst) \
00355 : "r"(stride), "m"(rnd) \
00356 : "memory" \
00357 ); \
00358 }
00359
00368 #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00369 static void \
00370 OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \
00371 x86_reg stride, int rnd, x86_reg offset) \
00372 { \
00373 int h = 8; \
00374 src -= offset; \
00375 rnd = 32-rnd; \
00376 __asm__ volatile ( \
00377 LOAD_ROUNDER_MMX("%6") \
00378 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00379 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00380 ASMALIGN(3) \
00381 "1: \n\t" \
00382 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00383 NORMALIZE_MMX("$6") \
00384 TRANSFER_DO_PACK(OP) \
00385 "add %5, %1 \n\t" \
00386 "add %5, %2 \n\t" \
00387 "decl %0 \n\t" \
00388 "jnz 1b \n\t" \
00389 : "+r"(h), "+r" (src), "+r" (dst) \
00390 : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd) \
00391 : "memory" \
00392 ); \
00393 }
00394
00396 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_PUT, put_)
00397 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_AVG, avg_)
00398 MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )")
00399 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)
00400 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)
00401
00403 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_PUT, put_)
00404 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_AVG, avg_)
00405 MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )")
00406 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)
00407 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)
00408
00409 typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);
00410 typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);
00411 typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);
00412
00424 #define VC1_MSPEL_MC(OP)\
00425 static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\
00426 int hmode, int vmode, int rnd)\
00427 {\
00428 static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\
00429 { NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\
00430 static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\
00431 { NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\
00432 static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\
00433 { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\
00434 \
00435 __asm__ volatile(\
00436 "pxor %%mm0, %%mm0 \n\t"\
00437 ::: "memory"\
00438 );\
00439 \
00440 if (vmode) { \
00441 if (hmode) { \
00442 static const int shift_value[] = { 0, 5, 1, 5 };\
00443 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
00444 int r;\
00445 DECLARE_ALIGNED(16, int16_t, tmp)[12*8];\
00446 \
00447 r = (1<<(shift-1)) + rnd-1;\
00448 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
00449 \
00450 vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\
00451 return;\
00452 }\
00453 else { \
00454 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
00455 return;\
00456 }\
00457 }\
00458 \
00459 \
00460 vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\
00461 }
00462
00463 VC1_MSPEL_MC(put_)
00464 VC1_MSPEL_MC(avg_)
00465
00467 #define DECLARE_FUNCTION(a, b) \
00468 static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00469 put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00470 }\
00471 static void avg_vc1_mspel_mc ## a ## b ## _mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00472 avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00473 }
00474
00475 DECLARE_FUNCTION(0, 1)
00476 DECLARE_FUNCTION(0, 2)
00477 DECLARE_FUNCTION(0, 3)
00478
00479 DECLARE_FUNCTION(1, 0)
00480 DECLARE_FUNCTION(1, 1)
00481 DECLARE_FUNCTION(1, 2)
00482 DECLARE_FUNCTION(1, 3)
00483
00484 DECLARE_FUNCTION(2, 0)
00485 DECLARE_FUNCTION(2, 1)
00486 DECLARE_FUNCTION(2, 2)
00487 DECLARE_FUNCTION(2, 3)
00488
00489 DECLARE_FUNCTION(3, 0)
00490 DECLARE_FUNCTION(3, 1)
00491 DECLARE_FUNCTION(3, 2)
00492 DECLARE_FUNCTION(3, 3)
00493
00494 static void vc1_inv_trans_4x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00495 {
00496 int dc = block[0];
00497 dc = (17 * dc + 4) >> 3;
00498 dc = (17 * dc + 64) >> 7;
00499 __asm__ volatile(
00500 "movd %0, %%mm0 \n\t"
00501 "pshufw $0, %%mm0, %%mm0 \n\t"
00502 "pxor %%mm1, %%mm1 \n\t"
00503 "psubw %%mm0, %%mm1 \n\t"
00504 "packuswb %%mm0, %%mm0 \n\t"
00505 "packuswb %%mm1, %%mm1 \n\t"
00506 ::"r"(dc)
00507 );
00508 __asm__ volatile(
00509 "movd %0, %%mm2 \n\t"
00510 "movd %1, %%mm3 \n\t"
00511 "movd %2, %%mm4 \n\t"
00512 "movd %3, %%mm5 \n\t"
00513 "paddusb %%mm0, %%mm2 \n\t"
00514 "paddusb %%mm0, %%mm3 \n\t"
00515 "paddusb %%mm0, %%mm4 \n\t"
00516 "paddusb %%mm0, %%mm5 \n\t"
00517 "psubusb %%mm1, %%mm2 \n\t"
00518 "psubusb %%mm1, %%mm3 \n\t"
00519 "psubusb %%mm1, %%mm4 \n\t"
00520 "psubusb %%mm1, %%mm5 \n\t"
00521 "movd %%mm2, %0 \n\t"
00522 "movd %%mm3, %1 \n\t"
00523 "movd %%mm4, %2 \n\t"
00524 "movd %%mm5, %3 \n\t"
00525 :"+m"(*(uint32_t*)(dest+0*linesize)),
00526 "+m"(*(uint32_t*)(dest+1*linesize)),
00527 "+m"(*(uint32_t*)(dest+2*linesize)),
00528 "+m"(*(uint32_t*)(dest+3*linesize))
00529 );
00530 }
00531
00532 static void vc1_inv_trans_4x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00533 {
00534 int dc = block[0];
00535 dc = (17 * dc + 4) >> 3;
00536 dc = (12 * dc + 64) >> 7;
00537 __asm__ volatile(
00538 "movd %0, %%mm0 \n\t"
00539 "pshufw $0, %%mm0, %%mm0 \n\t"
00540 "pxor %%mm1, %%mm1 \n\t"
00541 "psubw %%mm0, %%mm1 \n\t"
00542 "packuswb %%mm0, %%mm0 \n\t"
00543 "packuswb %%mm1, %%mm1 \n\t"
00544 ::"r"(dc)
00545 );
00546 __asm__ volatile(
00547 "movd %0, %%mm2 \n\t"
00548 "movd %1, %%mm3 \n\t"
00549 "movd %2, %%mm4 \n\t"
00550 "movd %3, %%mm5 \n\t"
00551 "paddusb %%mm0, %%mm2 \n\t"
00552 "paddusb %%mm0, %%mm3 \n\t"
00553 "paddusb %%mm0, %%mm4 \n\t"
00554 "paddusb %%mm0, %%mm5 \n\t"
00555 "psubusb %%mm1, %%mm2 \n\t"
00556 "psubusb %%mm1, %%mm3 \n\t"
00557 "psubusb %%mm1, %%mm4 \n\t"
00558 "psubusb %%mm1, %%mm5 \n\t"
00559 "movd %%mm2, %0 \n\t"
00560 "movd %%mm3, %1 \n\t"
00561 "movd %%mm4, %2 \n\t"
00562 "movd %%mm5, %3 \n\t"
00563 :"+m"(*(uint32_t*)(dest+0*linesize)),
00564 "+m"(*(uint32_t*)(dest+1*linesize)),
00565 "+m"(*(uint32_t*)(dest+2*linesize)),
00566 "+m"(*(uint32_t*)(dest+3*linesize))
00567 );
00568 dest += 4*linesize;
00569 __asm__ volatile(
00570 "movd %0, %%mm2 \n\t"
00571 "movd %1, %%mm3 \n\t"
00572 "movd %2, %%mm4 \n\t"
00573 "movd %3, %%mm5 \n\t"
00574 "paddusb %%mm0, %%mm2 \n\t"
00575 "paddusb %%mm0, %%mm3 \n\t"
00576 "paddusb %%mm0, %%mm4 \n\t"
00577 "paddusb %%mm0, %%mm5 \n\t"
00578 "psubusb %%mm1, %%mm2 \n\t"
00579 "psubusb %%mm1, %%mm3 \n\t"
00580 "psubusb %%mm1, %%mm4 \n\t"
00581 "psubusb %%mm1, %%mm5 \n\t"
00582 "movd %%mm2, %0 \n\t"
00583 "movd %%mm3, %1 \n\t"
00584 "movd %%mm4, %2 \n\t"
00585 "movd %%mm5, %3 \n\t"
00586 :"+m"(*(uint32_t*)(dest+0*linesize)),
00587 "+m"(*(uint32_t*)(dest+1*linesize)),
00588 "+m"(*(uint32_t*)(dest+2*linesize)),
00589 "+m"(*(uint32_t*)(dest+3*linesize))
00590 );
00591 }
00592
00593 static void vc1_inv_trans_8x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00594 {
00595 int dc = block[0];
00596 dc = ( 3 * dc + 1) >> 1;
00597 dc = (17 * dc + 64) >> 7;
00598 __asm__ volatile(
00599 "movd %0, %%mm0 \n\t"
00600 "pshufw $0, %%mm0, %%mm0 \n\t"
00601 "pxor %%mm1, %%mm1 \n\t"
00602 "psubw %%mm0, %%mm1 \n\t"
00603 "packuswb %%mm0, %%mm0 \n\t"
00604 "packuswb %%mm1, %%mm1 \n\t"
00605 ::"r"(dc)
00606 );
00607 __asm__ volatile(
00608 "movq %0, %%mm2 \n\t"
00609 "movq %1, %%mm3 \n\t"
00610 "movq %2, %%mm4 \n\t"
00611 "movq %3, %%mm5 \n\t"
00612 "paddusb %%mm0, %%mm2 \n\t"
00613 "paddusb %%mm0, %%mm3 \n\t"
00614 "paddusb %%mm0, %%mm4 \n\t"
00615 "paddusb %%mm0, %%mm5 \n\t"
00616 "psubusb %%mm1, %%mm2 \n\t"
00617 "psubusb %%mm1, %%mm3 \n\t"
00618 "psubusb %%mm1, %%mm4 \n\t"
00619 "psubusb %%mm1, %%mm5 \n\t"
00620 "movq %%mm2, %0 \n\t"
00621 "movq %%mm3, %1 \n\t"
00622 "movq %%mm4, %2 \n\t"
00623 "movq %%mm5, %3 \n\t"
00624 :"+m"(*(uint32_t*)(dest+0*linesize)),
00625 "+m"(*(uint32_t*)(dest+1*linesize)),
00626 "+m"(*(uint32_t*)(dest+2*linesize)),
00627 "+m"(*(uint32_t*)(dest+3*linesize))
00628 );
00629 }
00630
00631 static void vc1_inv_trans_8x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00632 {
00633 int dc = block[0];
00634 dc = (3 * dc + 1) >> 1;
00635 dc = (3 * dc + 16) >> 5;
00636 __asm__ volatile(
00637 "movd %0, %%mm0 \n\t"
00638 "pshufw $0, %%mm0, %%mm0 \n\t"
00639 "pxor %%mm1, %%mm1 \n\t"
00640 "psubw %%mm0, %%mm1 \n\t"
00641 "packuswb %%mm0, %%mm0 \n\t"
00642 "packuswb %%mm1, %%mm1 \n\t"
00643 ::"r"(dc)
00644 );
00645 __asm__ volatile(
00646 "movq %0, %%mm2 \n\t"
00647 "movq %1, %%mm3 \n\t"
00648 "movq %2, %%mm4 \n\t"
00649 "movq %3, %%mm5 \n\t"
00650 "paddusb %%mm0, %%mm2 \n\t"
00651 "paddusb %%mm0, %%mm3 \n\t"
00652 "paddusb %%mm0, %%mm4 \n\t"
00653 "paddusb %%mm0, %%mm5 \n\t"
00654 "psubusb %%mm1, %%mm2 \n\t"
00655 "psubusb %%mm1, %%mm3 \n\t"
00656 "psubusb %%mm1, %%mm4 \n\t"
00657 "psubusb %%mm1, %%mm5 \n\t"
00658 "movq %%mm2, %0 \n\t"
00659 "movq %%mm3, %1 \n\t"
00660 "movq %%mm4, %2 \n\t"
00661 "movq %%mm5, %3 \n\t"
00662 :"+m"(*(uint32_t*)(dest+0*linesize)),
00663 "+m"(*(uint32_t*)(dest+1*linesize)),
00664 "+m"(*(uint32_t*)(dest+2*linesize)),
00665 "+m"(*(uint32_t*)(dest+3*linesize))
00666 );
00667 dest += 4*linesize;
00668 __asm__ volatile(
00669 "movq %0, %%mm2 \n\t"
00670 "movq %1, %%mm3 \n\t"
00671 "movq %2, %%mm4 \n\t"
00672 "movq %3, %%mm5 \n\t"
00673 "paddusb %%mm0, %%mm2 \n\t"
00674 "paddusb %%mm0, %%mm3 \n\t"
00675 "paddusb %%mm0, %%mm4 \n\t"
00676 "paddusb %%mm0, %%mm5 \n\t"
00677 "psubusb %%mm1, %%mm2 \n\t"
00678 "psubusb %%mm1, %%mm3 \n\t"
00679 "psubusb %%mm1, %%mm4 \n\t"
00680 "psubusb %%mm1, %%mm5 \n\t"
00681 "movq %%mm2, %0 \n\t"
00682 "movq %%mm3, %1 \n\t"
00683 "movq %%mm4, %2 \n\t"
00684 "movq %%mm5, %3 \n\t"
00685 :"+m"(*(uint32_t*)(dest+0*linesize)),
00686 "+m"(*(uint32_t*)(dest+1*linesize)),
00687 "+m"(*(uint32_t*)(dest+2*linesize)),
00688 "+m"(*(uint32_t*)(dest+3*linesize))
00689 );
00690 }
00691
00692 void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx) {
00693 mm_flags = mm_support();
00694
00695 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx;
00696 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx;
00697 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx;
00698 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_mmx;
00699
00700 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_mmx;
00701 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_mmx;
00702 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_mmx;
00703 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_mmx;
00704
00705 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_mmx;
00706 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_mmx;
00707 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_mmx;
00708 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_mmx;
00709
00710 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_mmx;
00711 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx;
00712 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx;
00713 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
00714
00715 if (mm_flags & FF_MM_MMX2){
00716 dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2;
00717 dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2;
00718 dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2;
00719 dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmx2;
00720
00721 dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmx2;
00722 dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmx2;
00723 dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmx2;
00724 dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmx2;
00725
00726 dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmx2;
00727 dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmx2;
00728 dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmx2;
00729 dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmx2;
00730
00731 dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmx2;
00732 dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmx2;
00733 dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmx2;
00734 dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmx2;
00735
00736 dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_mmx2;
00737 dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_mmx2;
00738 dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_mmx2;
00739 dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_mmx2;
00740 }
00741 }