64 static void ac3_bit_alloc_calc_bap_mips(int16_t *
mask, int16_t *psd,
66 int snr_offset,
int floor,
67 const uint8_t *
bap_tab, uint8_t *bap)
69 int band, band_end,
cond;
70 int m, address1, address2;
71 int16_t *psd1, *psd_end;
74 if (snr_offset == -960) {
86 band_end =
FFMIN(band_end, end);
87 psd_end = psd + band_end - 1;
90 "slt %[cond], %[psd1], %[psd_end] \n\t"
91 "beqz %[cond], 1f \n\t"
93 "lh %[address1], 0(%[psd1]) \n\t"
94 "lh %[address2], 2(%[psd1]) \n\t"
96 "subu %[address1], %[address1], %[m] \n\t"
97 "sra %[address1], %[address1], 5 \n\t"
98 "addiu %[address1], %[address1], -32 \n\t"
99 "shll_s.w %[address1], %[address1], 26 \n\t"
100 "subu %[address2], %[address2], %[m] \n\t"
101 "sra %[address2], %[address2], 5 \n\t"
102 "sra %[address1], %[address1], 26 \n\t"
103 "addiu %[address1], %[address1], 32 \n\t"
104 "lbux %[address1], %[address1](%[bap_tab]) \n\t"
105 "addiu %[address2], %[address2], -32 \n\t"
106 "shll_s.w %[address2], %[address2], 26 \n\t"
107 "sb %[address1], 0(%[bap1]) \n\t"
108 "slt %[cond], %[psd1], %[psd_end] \n\t"
109 "sra %[address2], %[address2], 26 \n\t"
110 "addiu %[address2], %[address2], 32 \n\t"
111 "lbux %[address2], %[address2](%[bap_tab]) \n\t"
112 "sb %[address2], 1(%[bap1]) \n\t"
114 "bnez %[cond], 2b \n\t"
115 PTR_ADDIU " %[psd_end], %[psd_end], 2 \n\t"
116 "slt %[cond], %[psd1], %[psd_end] \n\t"
117 "beqz %[cond], 3f \n\t"
119 "lh %[address1], 0(%[psd1]) \n\t"
121 "subu %[address1], %[address1], %[m] \n\t"
122 "sra %[address1], %[address1], 5 \n\t"
123 "addiu %[address1], %[address1], -32 \n\t"
124 "shll_s.w %[address1], %[address1], 26 \n\t"
125 "sra %[address1], %[address1], 26 \n\t"
126 "addiu %[address1], %[address1], 32 \n\t"
127 "lbux %[address1], %[address1](%[bap_tab]) \n\t"
128 "sb %[address1], 0(%[bap1]) \n\t"
132 : [address1]
"=&r"(address1), [address2]
"=&r"(address2),
133 [
cond]
"=&r"(
cond), [bap1]
"+r"(bap1),
134 [psd1]
"+r"(psd1), [psd_end]
"+r"(psd_end)
138 }
while (end > band_end);
141 static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16], uint8_t *bap,
144 void *temp0, *temp2, *temp4, *temp5, *temp6, *temp7;
148 "andi %[temp3], %[len], 3 \n\t"
149 PTR_ADDU "%[temp2], %[bap], %[len] \n\t"
150 PTR_ADDU "%[temp4], %[bap], %[temp3] \n\t"
151 "beq %[temp2], %[temp4], 4f \n\t"
153 "lbu %[temp0], -1(%[temp2]) \n\t"
154 "lbu %[temp5], -2(%[temp2]) \n\t"
155 "lbu %[temp6], -3(%[temp2]) \n\t"
156 "sll %[temp0], %[temp0], 1 \n\t"
157 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t"
158 "sll %[temp5], %[temp5], 1 \n\t"
159 PTR_ADDU "%[temp5], %[mant_cnt], %[temp5] \n\t"
160 "lhu %[temp1], 0(%[temp0]) \n\t"
161 "sll %[temp6], %[temp6], 1 \n\t"
162 PTR_ADDU "%[temp6], %[mant_cnt], %[temp6] \n\t"
163 "addiu %[temp1], %[temp1], 1 \n\t"
164 "sh %[temp1], 0(%[temp0]) \n\t"
165 "lhu %[temp1], 0(%[temp5]) \n\t"
166 "lbu %[temp7], -4(%[temp2]) \n\t"
168 "addiu %[temp1], %[temp1], 1 \n\t"
169 "sh %[temp1], 0(%[temp5]) \n\t"
170 "lhu %[temp1], 0(%[temp6]) \n\t"
171 "sll %[temp7], %[temp7], 1 \n\t"
172 PTR_ADDU "%[temp7], %[mant_cnt], %[temp7] \n\t"
173 "addiu %[temp1], %[temp1],1 \n\t"
174 "sh %[temp1], 0(%[temp6]) \n\t"
175 "lhu %[temp1], 0(%[temp7]) \n\t"
176 "addiu %[temp1], %[temp1], 1 \n\t"
177 "sh %[temp1], 0(%[temp7]) \n\t"
178 "bne %[temp2], %[temp4], 1b \n\t"
180 "beqz %[temp3], 2f \n\t"
182 "addiu %[temp3], %[temp3], -1 \n\t"
183 "lbu %[temp0], -1(%[temp2]) \n\t"
185 "sll %[temp0], %[temp0], 1 \n\t"
186 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t"
187 "lhu %[temp1], 0(%[temp0]) \n\t"
188 "addiu %[temp1], %[temp1], 1 \n\t"
189 "sh %[temp1], 0(%[temp0]) \n\t"
190 "bgtz %[temp3], 3b \n\t"
193 : [temp0]
"=&r" (temp0), [temp1]
"=&r" (temp1),
194 [temp2]
"=&r" (temp2), [temp3]
"=&r" (temp3),
195 [temp4]
"=&r" (temp4), [temp5]
"=&r" (temp5),
196 [temp6]
"=&r" (temp6), [temp7]
"=&r" (temp7)
197 : [
len]
"r" (
len), [bap]
"r" (bap),
198 [mant_cnt]
"r" (mant_cnt)
205 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
206 static void float_to_fixed24_mips(
int32_t *dst,
const float *
src,
unsigned int len)
208 const float scale = 1 << 24;
210 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
214 "lwc1 %[src0], 0(%[src]) \n\t"
215 "lwc1 %[src1], 4(%[src]) \n\t"
216 "lwc1 %[src2], 8(%[src]) \n\t"
217 "lwc1 %[src3], 12(%[src]) \n\t"
218 "lwc1 %[src4], 16(%[src]) \n\t"
219 "lwc1 %[src5], 20(%[src]) \n\t"
220 "lwc1 %[src6], 24(%[src]) \n\t"
221 "lwc1 %[src7], 28(%[src]) \n\t"
222 "mul.s %[src0], %[src0], %[scale] \n\t"
223 "mul.s %[src1], %[src1], %[scale] \n\t"
224 "mul.s %[src2], %[src2], %[scale] \n\t"
225 "mul.s %[src3], %[src3], %[scale] \n\t"
226 "mul.s %[src4], %[src4], %[scale] \n\t"
227 "mul.s %[src5], %[src5], %[scale] \n\t"
228 "mul.s %[src6], %[src6], %[scale] \n\t"
229 "mul.s %[src7], %[src7], %[scale] \n\t"
230 "cvt.w.s %[src0], %[src0] \n\t"
231 "cvt.w.s %[src1], %[src1] \n\t"
232 "cvt.w.s %[src2], %[src2] \n\t"
233 "cvt.w.s %[src3], %[src3] \n\t"
234 "cvt.w.s %[src4], %[src4] \n\t"
235 "cvt.w.s %[src5], %[src5] \n\t"
236 "cvt.w.s %[src6], %[src6] \n\t"
237 "cvt.w.s %[src7], %[src7] \n\t"
238 "mfc1 %[temp0], %[src0] \n\t"
239 "mfc1 %[temp1], %[src1] \n\t"
240 "mfc1 %[temp2], %[src2] \n\t"
241 "mfc1 %[temp3], %[src3] \n\t"
242 "mfc1 %[temp4], %[src4] \n\t"
243 "mfc1 %[temp5], %[src5] \n\t"
244 "mfc1 %[temp6], %[src6] \n\t"
245 "mfc1 %[temp7], %[src7] \n\t"
246 "sw %[temp0], 0(%[dst]) \n\t"
247 "sw %[temp1], 4(%[dst]) \n\t"
248 "sw %[temp2], 8(%[dst]) \n\t"
249 "sw %[temp3], 12(%[dst]) \n\t"
250 "sw %[temp4], 16(%[dst]) \n\t"
251 "sw %[temp5], 20(%[dst]) \n\t"
252 "sw %[temp6], 24(%[dst]) \n\t"
253 "sw %[temp7], 28(%[dst]) \n\t"
255 : [dst]
"+r" (dst), [
src]
"+r" (
src),
257 [
src2]
"=&f" (
src2), [src3]
"=&f" (src3),
258 [src4]
"=&f" (src4), [src5]
"=&f" (src5),
259 [src6]
"=&f" (src6), [src7]
"=&f" (src7),
260 [temp0]
"=r" (temp0), [temp1]
"=r" (temp1),
261 [temp2]
"=r" (temp2), [temp3]
"=r" (temp3),
262 [temp4]
"=r" (temp4), [temp5]
"=r" (temp5),
263 [temp6]
"=r" (temp6), [temp7]
"=r" (temp7)
273 static void ac3_downmix_mips(
float **
samples,
float (*
matrix)[2],
274 int out_ch,
int in_ch,
int len)
276 int i, j, i1, i2, i3;
277 float v0, v1, v2, v3;
278 float v4, v5, v6, v7;
279 float samples0, samples1, samples2, samples3, matrix_j, matrix_j2;
280 float *samples_p, *samples_sw, *matrix_p, **samples_x, **samples_end;
284 ".set noreorder \n\t"
288 "move %[i], $zero \n\t"
289 "sll %[j], %[in_ch], " PTRLOG " \n\t"
291 "bne %[out_ch], %[i1], 3f \n\t"
295 "move %[matrix_p], %[matrix] \n\t"
296 "move %[samples_x], %[samples] \n\t"
297 "mtc1 $zero, %[v0] \n\t"
298 "mtc1 $zero, %[v1] \n\t"
299 "mtc1 $zero, %[v2] \n\t"
300 "mtc1 $zero, %[v3] \n\t"
301 "mtc1 $zero, %[v4] \n\t"
302 "mtc1 $zero, %[v5] \n\t"
303 "mtc1 $zero, %[v6] \n\t"
304 "mtc1 $zero, %[v7] \n\t"
305 "addiu %[i1], %[i], 4 \n\t"
306 "addiu %[i2], %[i], 8 \n\t"
307 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
308 "addiu %[i3], %[i], 12 \n\t"
309 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t"
310 "move %[samples_sw], %[samples_p] \n\t"
313 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t"
314 "lwc1 %[matrix_j2], 4(%[matrix_p]) \n\t"
315 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t"
316 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t"
317 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t"
318 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t"
321 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t"
322 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t"
323 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t"
324 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t"
325 "madd.s %[v4], %[v4], %[samples0], %[matrix_j2]\n\t"
326 "madd.s %[v5], %[v5], %[samples1], %[matrix_j2]\n\t"
327 "madd.s %[v6], %[v6], %[samples2], %[matrix_j2]\n\t"
328 "madd.s %[v7], %[v7], %[samples3], %[matrix_j2]\n\t"
329 "bne %[samples_x], %[samples_end], 1b \n\t"
330 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
333 "swxc1 %[v0], %[i](%[samples_sw]) \n\t"
334 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t"
335 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t"
336 "swxc1 %[v3], %[i3](%[samples_sw]) \n\t"
337 "swxc1 %[v4], %[i](%[samples_p]) \n\t"
338 "addiu %[i], 16 \n\t"
339 "swxc1 %[v5], %[i1](%[samples_p]) \n\t"
340 "swxc1 %[v6], %[i2](%[samples_p]) \n\t"
341 "bne %[i], %[len], 2b \n\t"
342 " swxc1 %[v7], %[i3](%[samples_p]) \n\t"
345 "bne %[out_ch], %[i2], 6f \n\t"
349 "move %[matrix_p], %[matrix] \n\t"
350 "move %[samples_x], %[samples] \n\t"
351 "mtc1 $zero, %[v0] \n\t"
352 "mtc1 $zero, %[v1] \n\t"
353 "mtc1 $zero, %[v2] \n\t"
354 "mtc1 $zero, %[v3] \n\t"
355 "addiu %[i1], %[i], 4 \n\t"
356 "addiu %[i2], %[i], 8 \n\t"
357 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
358 "addiu %[i3], %[i], 12 \n\t"
359 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t"
360 "move %[samples_sw], %[samples_p] \n\t"
363 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t"
364 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t"
365 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t"
366 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t"
367 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t"
370 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t"
371 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t"
372 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t"
373 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t"
374 "bne %[samples_x], %[samples_end], 4b \n\t"
375 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
377 "swxc1 %[v0], %[i](%[samples_sw]) \n\t"
378 "addiu %[i], 16 \n\t"
379 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t"
380 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t"
381 "bne %[i], %[len], 5b \n\t"
382 " swxc1 %[v3], %[i3](%[samples_sw]) \n\t"
386 :[samples_p]
"=&r"(samples_p), [matrix_j]
"=&f"(matrix_j), [matrix_j2]
"=&f"(matrix_j2),
387 [samples0]
"=&f"(samples0), [samples1]
"=&f"(samples1),
388 [samples2]
"=&f"(samples2), [samples3]
"=&f"(samples3),
389 [
v0]
"=&f"(
v0), [v1]
"=&f"(v1), [v2]
"=&f"(v2), [v3]
"=&f"(v3),
390 [v4]
"=&f"(v4), [v5]
"=&f"(v5), [v6]
"=&f"(v6), [v7]
"=&f"(v7),
391 [samples_x]
"=&r"(samples_x), [matrix_p]
"=&r"(matrix_p),
392 [samples_end]
"=&r"(samples_end), [samples_sw]
"=&r"(samples_sw),
393 [i1]
"=&r"(i1), [i2]
"=&r"(i2), [i3]
"=&r"(i3), [
i]
"=&r"(
i),
394 [j]
"=&r"(j), [
len]
"+r"(
len)
396 [in_ch]
"r"(in_ch), [out_ch]
"r"(out_ch)
408 c->bit_alloc_calc_bap = ac3_bit_alloc_calc_bap_mips;
409 c->update_bap_counts = ac3_update_bap_counts_mips;
412 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
413 c->float_to_fixed24 = float_to_fixed24_mips;