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21 #if HAVE_SCHED_GETAFFINITY
30 #include <stdatomic.h>
38 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
43 #include <sys/param.h>
45 #include <sys/types.h>
46 #include <sys/sysctl.h>
52 #if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
121 static const AVOption cpuflags_opts[] = {
156 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
157 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
158 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
163 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
164 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
165 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
166 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
213 .option = cpuflags_opts,
216 const AVClass *pclass = &
class;
230 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
235 if (!sched_getaffinity(0,
sizeof(cpuset), &cpuset))
236 nb_cpus = CPU_COUNT(&cpuset);
237 #elif HAVE_GETPROCESSAFFINITYMASK
238 DWORD_PTR proc_aff, sys_aff;
239 if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
241 #elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
242 int mib[2] = { CTL_HW, HW_NCPUONLINE };
243 size_t len =
sizeof(nb_cpus);
245 if (sysctl(mib, 2, &nb_cpus, &
len,
NULL, 0) == -1)
247 #elif HAVE_SYSCTL && defined(HW_NCPU)
248 int mib[2] = { CTL_HW, HW_NCPU };
249 size_t len =
sizeof(nb_cpus);
251 if (sysctl(mib, 2, &nb_cpus, &
len,
NULL, 0) == -1)
253 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
254 nb_cpus = sysconf(_SC_NPROC_ONLN);
255 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
256 nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
258 GetNativeSystemInfo(&sysinfo);
259 nb_cpus = sysinfo.dwNumberOfProcessors;
304 return getauxval(
type);
305 #elif HAVE_ELF_AUX_INFO
306 unsigned long aux = 0;
307 int ret = elf_aux_info(
type, &aux,
sizeof(aux));
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
#define AV_LOG_WARNING
Something somehow does not look correct.
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
static atomic_int cpu_count
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
void av_cpu_force_count(int count)
Overrides cpu count detection and forces the specified count.
int ff_get_cpu_flags_wasm(void)
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
int ff_get_cpu_flags_arm(void)
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
size_t ff_get_cpu_max_align_loongarch(void)
int ff_get_cpu_flags_loongarch(void)
#define AV_CPU_FLAG_DOTPROD
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
static atomic_int cpu_flags
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
#define AV_CPU_FLAG_RVB
B (bit manipulations)
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf type
#define AV_CPU_FLAG_VSX
ISA 2.06.
#define AV_CPU_FLAG_RVV_F32
Vectors of float's */.
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
size_t ff_get_cpu_max_align_x86(void)
#define AV_CPU_FLAG_ARMV6
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
size_t ff_get_cpu_max_align_mips(void)
size_t ff_get_cpu_max_align_aarch64(void)
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
size_t ff_get_cpu_max_align_wasm(void)
#define LIBAVUTIL_VERSION_INT
Describe the class of an AVClass context structure.
unsigned long ff_getauxval(unsigned long type)
#define AV_CPU_FLAG_AVX512ICL
F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ.
const char * av_default_item_name(void *ptr)
Return the context name.
size_t av_cpu_max_align(void)
Get the maximum data alignment that may be required by FFmpeg.
int ff_get_cpu_flags_aarch64(void)
#define AV_CPU_FLAG_CMOV
supports cmov instruction
#define AV_CPU_FLAG_ALTIVEC
standard
#define atomic_load_explicit(object, order)
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
#define AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
#define AV_CPU_FLAG_SIMD128
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's */.
#define atomic_store_explicit(object, desired, order)
#define AV_CPU_FLAG_ARMV8
int ff_get_cpu_flags_x86(void)
static int get_cpu_flags(void)
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
#define AV_CPU_FLAG_VFPV3
size_t ff_get_cpu_max_align_arm(void)
#define AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_MMX
standard MMX
#define AV_CPU_FLAG_RVI
I (full GPR bank)
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
#define AV_CPU_FLAG_POWER8
ISA 2.07.
#define atomic_exchange_explicit(object, desired, order)
#define AV_CPU_FLAG_SSE
SSE functions.
int ff_get_cpu_flags_mips(void)
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
size_t ff_get_cpu_max_align_ppc(void)
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
@ AV_OPT_TYPE_FLAGS
Underlying C type is unsigned int.
#define flags(name, subs,...)
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's */.
int ff_get_cpu_flags_riscv(void)
@ AV_OPT_TYPE_CONST
Special option type for declaring named constants.
#define AV_CPU_FLAG_ARMV6T2