FFmpeg
cpu.c
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1 /*
2  * Copyright © 2022 Rémi Denis-Courmont.
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 
21 #define _GNU_SOURCE
22 #include "libavutil/cpu.h"
23 #include "libavutil/cpu_internal.h"
24 #include "libavutil/macros.h"
25 #include "libavutil/log.h"
26 #include "config.h"
27 
28 #if HAVE_GETAUXVAL
29 #include <sys/auxv.h>
30 #define HWCAP_RV(letter) (1ul << ((letter) - 'A'))
31 #endif
32 #if HAVE_SYS_HWPROBE_H
33 #include <sys/hwprobe.h>
34 #elif HAVE_ASM_HWPROBE_H
35 #include <asm/hwprobe.h>
36 #include <sys/syscall.h>
37 #include <unistd.h>
38 
39 static int __riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
40  size_t cpu_count, unsigned long *cpus,
41  unsigned int flags)
42 {
43  return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus,
44  flags);
45 }
46 #endif
47 
49 {
50  int ret = 0;
51 #if HAVE_SYS_HWPROBE_H || HAVE_ASM_HWPROBE_H
52  struct riscv_hwprobe pairs[] = {
53  { RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0 },
54  { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 },
55  { RISCV_HWPROBE_KEY_CPUPERF_0, 0 },
56  };
57 
58  if (__riscv_hwprobe(pairs, FF_ARRAY_ELEMS(pairs), 0, NULL, 0) == 0) {
59  if (pairs[0].value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA)
61  if (pairs[1].value & RISCV_HWPROBE_IMA_FD)
63 #ifdef RISCV_HWPROBE_IMA_V
64  if (pairs[1].value & RISCV_HWPROBE_IMA_V)
67 #endif
68 #ifdef RISCV_HWPROBE_EXT_ZBA
69  if (pairs[1].value & RISCV_HWPROBE_EXT_ZBA)
71 #endif
72 #ifdef RISCV_HWPROBE_EXT_ZBB
73  if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
75 #endif
76 #ifdef RISCV_HWPROBE_EXT_ZVBB
77  if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
79 #endif
80  switch (pairs[2].value & RISCV_HWPROBE_MISALIGNED_MASK) {
81  case RISCV_HWPROBE_MISALIGNED_FAST:
83  break;
84  default:
85  }
86  } else
87 #endif
88 #if HAVE_GETAUXVAL
89  {
90  const unsigned long hwcap = getauxval(AT_HWCAP);
91 
92  if (hwcap & HWCAP_RV('I'))
94  if (hwcap & HWCAP_RV('F'))
96  if (hwcap & HWCAP_RV('D'))
98 
99  /* The V extension implies all Zve* functional subsets */
100  if (hwcap & HWCAP_RV('V'))
103  }
104 #endif
105 
106 #ifdef __riscv_i
107  ret |= AV_CPU_FLAG_RVI;
108 #endif
109 #if defined (__riscv_flen) && (__riscv_flen >= 32)
110  ret |= AV_CPU_FLAG_RVF;
111 #if (__riscv_flen >= 64)
112  ret |= AV_CPU_FLAG_RVD;
113 #endif
114 #endif
115 
116 #ifdef __riscv_zba
118 #endif
119 #ifdef __riscv_zbb
121 #endif
122 
123  /* If RV-V is enabled statically at compile-time, check the details. */
124 #ifdef __riscv_vector
126 #if __riscv_v_elen >= 64
128 #endif
129 #if __riscv_v_elen_fp >= 32
131 #if __riscv_v_elen_fp >= 64
133 #endif
134 #endif
135 #endif
136 #ifdef __riscv_zvbb
138 #endif
139 
140  return ret;
141 }
cpu_count
static atomic_int cpu_count
Definition: cpu.c:53
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition: cpu.h:91
AV_CPU_FLAG_RV_ZVBB
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
Definition: cpu.h:93
AV_CPU_FLAG_RVF
#define AV_CPU_FLAG_RVF
F (single precision FP)
Definition: cpu.h:85
cpus
static const struct @415 cpus[]
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition: cpu.h:90
macros.h
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition: cpu.h:88
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
cpu_internal.h
AV_CPU_FLAG_RVB_ADDR
#define AV_CPU_FLAG_RVB_ADDR
Address bit-manipulations.
Definition: cpu.h:92
AV_CPU_FLAG_RVD
#define AV_CPU_FLAG_RVD
D (double precision FP)
Definition: cpu.h:86
NULL
#define NULL
Definition: coverity.c:32
cpu.h
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition: cpu.h:94
log.h
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:87
value
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default value
Definition: writing_filters.txt:86
ret
ret
Definition: filter_design.txt:187
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition: cpu.h:84
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:474
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:89
ff_get_cpu_flags_riscv
int ff_get_cpu_flags_riscv(void)
Definition: cpu.c:48