FFmpeg
cpu.c
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1 /*
2  * Copyright © 2022 Rémi Denis-Courmont.
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 
21 #define _GNU_SOURCE
22 #include "libavutil/cpu.h"
23 #include "libavutil/cpu_internal.h"
24 #include "libavutil/macros.h"
25 #include "libavutil/log.h"
26 #include "config.h"
27 
28 #if HAVE_GETAUXVAL
29 #include <sys/auxv.h>
30 #define HWCAP_RV(letter) (1ul << ((letter) - 'A'))
31 #endif
32 #if HAVE_SYS_HWPROBE_H
33 #include <sys/hwprobe.h>
34 #elif HAVE_ASM_HWPROBE_H
35 #include <asm/hwprobe.h>
36 #include <sys/syscall.h>
37 #include <unistd.h>
38 
39 static int __riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
40  size_t cpu_count, unsigned long *cpus,
41  unsigned int flags)
42 {
43  return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus,
44  flags);
45 }
46 #endif
47 
49 {
50  int ret = 0;
51 #if HAVE_SYS_HWPROBE_H || HAVE_ASM_HWPROBE_H
52  struct riscv_hwprobe pairs[] = {
53  { RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0 },
54  { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 },
55  { RISCV_HWPROBE_KEY_CPUPERF_0, 0 },
56  };
57 
58  if (__riscv_hwprobe(pairs, FF_ARRAY_ELEMS(pairs), 0, NULL, 0) == 0) {
59  if (pairs[0].value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA)
61 #ifdef RISCV_HWPROBE_IMA_V
62  if (pairs[1].value & RISCV_HWPROBE_IMA_V)
65 #endif
66 #ifdef RISCV_HWPROBE_EXT_ZBB
67  if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
69 #if defined (RISCV_HWPROBE_EXT_ZBA) && defined (RISCV_HWPROBE_EXT_ZBS)
70  if ((pairs[1].value & RISCV_HWPROBE_EXT_ZBA) &&
71  (pairs[1].value & RISCV_HWPROBE_EXT_ZBB) &&
72  (pairs[1].value & RISCV_HWPROBE_EXT_ZBS))
74 #endif
75 #endif
76 #ifdef RISCV_HWPROBE_EXT_ZVBB
77  if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
79 #endif
80  switch (pairs[2].value & RISCV_HWPROBE_MISALIGNED_MASK) {
81  case RISCV_HWPROBE_MISALIGNED_FAST:
83  break;
84  default:
85  }
86  }
87 #elif HAVE_GETAUXVAL
88  {
89  const unsigned long hwcap = ff_getauxval(AT_HWCAP);
90 
91  if (hwcap & HWCAP_RV('I'))
93  if (hwcap & HWCAP_RV('B'))
95 
96  /* The V extension implies all Zve* functional subsets */
97  if (hwcap & HWCAP_RV('V'))
100  }
101 #endif
102 
103 #ifdef __riscv_i
104  ret |= AV_CPU_FLAG_RVI;
105 #endif
106 
107 #ifdef __riscv_zbb
109 #endif
110 #if defined (__riscv_b) || \
111  (defined (__riscv_zba) && defined (__riscv_zbb) && defined (__riscv_zbs))
112  ret |= AV_CPU_FLAG_RVB;
113 #endif
114 
115  /* If RV-V is enabled statically at compile-time, check the details. */
116 #ifdef __riscv_vector
118 #if __riscv_v_elen >= 64
120 #endif
121 #if __riscv_v_elen_fp >= 32
123 #if __riscv_v_elen_fp >= 64
125 #endif
126 #endif
127 #endif
128 #ifdef __riscv_zvbb
130 #endif
131 
132  return ret;
133 }
cpu_count
static atomic_int cpu_count
Definition: cpu.c:57
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition: cpu.h:96
AV_CPU_FLAG_RV_ZVBB
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
Definition: cpu.h:100
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition: cpu.h:95
AV_CPU_FLAG_RVB
#define AV_CPU_FLAG_RVB
B (bit manipulations)
Definition: cpu.h:102
macros.h
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition: cpu.h:93
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
cpu_internal.h
ff_getauxval
unsigned long ff_getauxval(unsigned long type)
Definition: cpu.c:295
NULL
#define NULL
Definition: coverity.c:32
cpu.h
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition: cpu.h:101
log.h
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:92
value
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default value
Definition: writing_filters.txt:86
cpus
static const struct @462 cpus[]
ret
ret
Definition: filter_design.txt:187
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition: cpu.h:87
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:482
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:94
ff_get_cpu_flags_riscv
int ff_get_cpu_flags_riscv(void)
Definition: cpu.c:48