[FFmpeg-cvslog] lavc/pixblockdsp: RISC-V V 16-bit get_pixels & get_pixels_unaligned

Rémi Denis-Courmont git at videolan.org
Wed Sep 28 12:46:58 EEST 2022


ffmpeg | branch: master | Rémi Denis-Courmont <remi at remlab.net> | Tue Sep 27 23:04:26 2022 +0300| [ebee25855a453de56ff3bd06e666d07b26fa15b2] | committer: Lynne

lavc/pixblockdsp: RISC-V V 16-bit get_pixels & get_pixels_unaligned

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=ebee25855a453de56ff3bd06e666d07b26fa15b2
---

 libavcodec/riscv/pixblockdsp_init.c | 6 +++++-
 libavcodec/riscv/pixblockdsp_rvv.S  | 7 +++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/libavcodec/riscv/pixblockdsp_init.c b/libavcodec/riscv/pixblockdsp_init.c
index 69dbd18918..bbda381c12 100644
--- a/libavcodec/riscv/pixblockdsp_init.c
+++ b/libavcodec/riscv/pixblockdsp_init.c
@@ -34,6 +34,8 @@ void ff_get_pixels_16_rvi(int16_t *block, const uint8_t *pixels,
 
 void ff_get_pixels_8_rvv(int16_t *block, const uint8_t *pixels,
                          ptrdiff_t stride);
+void ff_get_pixels_16_rvv(int16_t *block, const uint8_t *pixels,
+                          ptrdiff_t stride);
 
 av_cold void ff_pixblockdsp_init_riscv(PixblockDSPContext *c,
                                        AVCodecContext *avctx,
@@ -50,7 +52,9 @@ av_cold void ff_pixblockdsp_init_riscv(PixblockDSPContext *c,
 
 #if HAVE_RVV
     if ((cpu_flags & AV_CPU_FLAG_RVV_I32) && ff_get_rv_vlenb() >= 16) {
-        if (!high_bit_depth)
+        if (high_bit_depth)
+            c->get_pixels_unaligned = c->get_pixels = ff_get_pixels_16_rvv;
+        else
             c->get_pixels_unaligned = c->get_pixels = ff_get_pixels_8_rvv;
     }
 #endif
diff --git a/libavcodec/riscv/pixblockdsp_rvv.S b/libavcodec/riscv/pixblockdsp_rvv.S
index 8d4322d8bc..3392b4b2eb 100644
--- a/libavcodec/riscv/pixblockdsp_rvv.S
+++ b/libavcodec/riscv/pixblockdsp_rvv.S
@@ -35,3 +35,10 @@ func ff_get_pixels_8_rvv, zve32x
         vsseg8e16.v  v8, (a0)
         ret
 endfunc
+
+func ff_get_pixels_16_rvv, zve32x
+        vsetivli     zero, 8, e16, m1, ta, ma
+        vlsseg8e16.v v0, (a1), a2
+        vsseg8e16.v  v0, (a0)
+        ret
+endfunc



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