[FFmpeg-devel] [PATCH v2] libavutil/riscv:update hwprobe for RVV and ZVBB with dl_hwcap

[daichengrong at iscas.ac.cn]

From: daichengrong <daichengrong at iscas.ac.cn>

Availability of RVV and ZVBB should be determined with dl_hwcap.

As those extensions rely on vector registers, kernel vector support 
is required to save the state of context switching.

FFmpeg requires hwprobe for hardware capability detection, and cooperates 
with dl_hwcap to detect whether the kernel supports vector.

---
 libavutil/riscv/cpu.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c
index 163e4fc14a..fad63eccea 100644
--- a/libavutil/riscv/cpu.c
+++ b/libavutil/riscv/cpu.c
@@ -55,6 +55,10 @@ int ff_get_cpu_flags_riscv(void)
         { RISCV_HWPROBE_KEY_CPUPERF_0, 0 },
     };
 
+#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
+    const unsigned long hwcap = ff_getauxval(AT_HWCAP);
+#endif
+
     if (__riscv_hwprobe(pairs, FF_ARRAY_ELEMS(pairs), 0, NULL, 0) == 0) {
         if (pairs[0].value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA)
             ret |= AV_CPU_FLAG_RVI;
@@ -62,6 +66,12 @@ int ff_get_cpu_flags_riscv(void)
         if (pairs[1].value & RISCV_HWPROBE_IMA_V)
             ret |= AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64
                  | AV_CPU_FLAG_RVV_F32 | AV_CPU_FLAG_RVV_F64;
+#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
+        /* The V extension implies all Zve* functional subsets */
+        if (!(hwcap & HWCAP_RV('V')))
+            ret &= ~(AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64
+                 | AV_CPU_FLAG_RVV_F32 | AV_CPU_FLAG_RVV_F64);
+#endif
 #endif
 #ifdef RISCV_HWPROBE_EXT_ZBB
         if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
@@ -76,6 +86,10 @@ int ff_get_cpu_flags_riscv(void)
 #ifdef RISCV_HWPROBE_EXT_ZVBB
         if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
             ret |= AV_CPU_FLAG_RV_ZVBB;
+#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
+        if (!(hwcap & HWCAP_RV('V')))
+            ret &= ~AV_CPU_FLAG_RV_ZVBB;
+#endif
 #endif
         switch (pairs[2].value & RISCV_HWPROBE_MISALIGNED_MASK) {
             case RISCV_HWPROBE_MISALIGNED_FAST:
-- 
2.25.1