Macros | Functions
cpu.h File Reference
#include <stddef.h>

Go to the source code of this file.


#define AV_CPU_FLAG_FORCE   0x80000000 /* force usage of selected flags (OR) */
#define AV_CPU_FLAG_MMX   0x0001
 standard MMX More...
#define AV_CPU_FLAG_MMXEXT   0x0002
 SSE integer functions or AMD MMX ext. More...
#define AV_CPU_FLAG_MMX2   0x0002
 SSE integer functions or AMD MMX ext. More...
#define AV_CPU_FLAG_3DNOW   0x0004
 AMD 3DNOW. More...
#define AV_CPU_FLAG_SSE   0x0008
 SSE functions. More...
#define AV_CPU_FLAG_SSE2   0x0010
 PIV SSE2 functions. More...
#define AV_CPU_FLAG_SSE2SLOW   0x40000000
 SSE2 supported, but usually not faster. More...
#define AV_CPU_FLAG_3DNOWEXT   0x0020
 AMD 3DNowExt. More...
#define AV_CPU_FLAG_SSE3   0x0040
 Prescott SSE3 functions. More...
#define AV_CPU_FLAG_SSE3SLOW   0x20000000
 SSE3 supported, but usually not faster. More...
#define AV_CPU_FLAG_SSSE3   0x0080
 Conroe SSSE3 functions. More...
#define AV_CPU_FLAG_SSSE3SLOW   0x4000000
 SSSE3 supported, but usually not faster. More...
#define AV_CPU_FLAG_ATOM   0x10000000
 Atom processor, some SSSE3 instructions are slower. More...
#define AV_CPU_FLAG_SSE4   0x0100
 Penryn SSE4.1 functions. More...
#define AV_CPU_FLAG_SSE42   0x0200
 Nehalem SSE4.2 functions. More...
#define AV_CPU_FLAG_AESNI   0x80000
 Advanced Encryption Standard functions. More...
#define AV_CPU_FLAG_AVX   0x4000
 AVX functions: requires OS support even if YMM registers aren't used. More...
#define AV_CPU_FLAG_AVXSLOW   0x8000000
 AVX supported, but slow when using YMM registers (e.g. Bulldozer) More...
#define AV_CPU_FLAG_XOP   0x0400
 Bulldozer XOP functions. More...
#define AV_CPU_FLAG_FMA4   0x0800
 Bulldozer FMA4 functions. More...
#define AV_CPU_FLAG_CMOV   0x1000
 supports cmov instruction More...
#define AV_CPU_FLAG_AVX2   0x8000
 AVX2 functions: requires OS support even if YMM registers aren't used. More...
#define AV_CPU_FLAG_FMA3   0x10000
 Haswell FMA3 functions. More...
#define AV_CPU_FLAG_BMI1   0x20000
 Bit Manipulation Instruction Set 1. More...
#define AV_CPU_FLAG_BMI2   0x40000
 Bit Manipulation Instruction Set 2. More...
#define AV_CPU_FLAG_AVX512   0x100000
 AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used. More...
#define AV_CPU_FLAG_AVX512ICL   0x200000
#define AV_CPU_FLAG_SLOW_GATHER   0x2000000
 CPU has slow gathers. More...
#define AV_CPU_FLAG_ALTIVEC   0x0001
 standard More...
#define AV_CPU_FLAG_VSX   0x0002
 ISA 2.06. More...
#define AV_CPU_FLAG_POWER8   0x0004
 ISA 2.07. More...
#define AV_CPU_FLAG_ARMV5TE   (1 << 0)
#define AV_CPU_FLAG_ARMV6   (1 << 1)
#define AV_CPU_FLAG_ARMV6T2   (1 << 2)
#define AV_CPU_FLAG_VFP   (1 << 3)
#define AV_CPU_FLAG_VFPV3   (1 << 4)
#define AV_CPU_FLAG_NEON   (1 << 5)
#define AV_CPU_FLAG_ARMV8   (1 << 6)
#define AV_CPU_FLAG_VFP_VM   (1 << 7)
 VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations. More...
#define AV_CPU_FLAG_DOTPROD   (1 << 8)
#define AV_CPU_FLAG_I8MM   (1 << 9)
#define AV_CPU_FLAG_SETEND   (1 <<16)
#define AV_CPU_FLAG_MMI   (1 << 0)
#define AV_CPU_FLAG_MSA   (1 << 1)
#define AV_CPU_FLAG_LSX   (1 << 0)
#define AV_CPU_FLAG_LASX   (1 << 1)
#define AV_CPU_FLAG_RVI   (1 << 0)
 I (full GPR bank) More...
#define AV_CPU_FLAG_RVF   (1 << 1)
 F (single precision FP) More...
#define AV_CPU_FLAG_RVD   (1 << 2)
 D (double precision FP) More...
#define AV_CPU_FLAG_RVV_I32   (1 << 3)
 Vectors of 8/16/32-bit int's *‍/. More...
#define AV_CPU_FLAG_RVV_F32   (1 << 4)
 Vectors of float's *‍/. More...
#define AV_CPU_FLAG_RVV_I64   (1 << 5)
 Vectors of 64-bit int's *‍/. More...
#define AV_CPU_FLAG_RVV_F64   (1 << 6)
 Vectors of double's. More...
#define AV_CPU_FLAG_RVB_BASIC   (1 << 7)
 Basic bit-manipulations. More...
#define AV_CPU_FLAG_RVB_ADDR   (1 << 8)
 Address bit-manipulations. More...
#define AV_CPU_FLAG_RV_ZVBB   (1 << 9)
 Vector basic bit-manipulations. More...
#define AV_CPU_FLAG_RV_MISALIGNED   (1 <<10)
 Fast misaligned accesses. More...


int av_get_cpu_flags (void)
 Return the flags which specify extensions supported by the CPU. More...
void av_force_cpu_flags (int flags)
 Disables cpu detection and forces the specified flags. More...
int av_parse_cpu_caps (unsigned *flags, const char *s)
 Parse CPU caps from a string and update the given AV_CPU_* flags based on that. More...
int av_cpu_count (void)
void av_cpu_force_count (int count)
 Overrides cpu count detection and forces the specified count. More...
size_t av_cpu_max_align (void)
 Get the maximum data alignment that may be required by FFmpeg. More...

Macro Definition Documentation


#define AV_CPU_FLAG_FORCE   0x80000000 /* force usage of selected flags (OR) */

Definition at line 26 of file cpu.h.


#define AV_CPU_FLAG_MMX   0x0001

standard MMX

Definition at line 29 of file cpu.h.


#define AV_CPU_FLAG_MMXEXT   0x0002

SSE integer functions or AMD MMX ext.

Definition at line 30 of file cpu.h.


#define AV_CPU_FLAG_MMX2   0x0002

SSE integer functions or AMD MMX ext.

Definition at line 31 of file cpu.h.


#define AV_CPU_FLAG_3DNOW   0x0004


Definition at line 32 of file cpu.h.


#define AV_CPU_FLAG_SSE   0x0008

SSE functions.

Definition at line 33 of file cpu.h.


#define AV_CPU_FLAG_SSE2   0x0010

PIV SSE2 functions.

Definition at line 34 of file cpu.h.


#define AV_CPU_FLAG_SSE2SLOW   0x40000000

SSE2 supported, but usually not faster.

than regular MMX/SSE (e.g. Core1)

Definition at line 35 of file cpu.h.


#define AV_CPU_FLAG_3DNOWEXT   0x0020

AMD 3DNowExt.

Definition at line 37 of file cpu.h.


#define AV_CPU_FLAG_SSE3   0x0040

Prescott SSE3 functions.

Definition at line 38 of file cpu.h.


#define AV_CPU_FLAG_SSE3SLOW   0x20000000

SSE3 supported, but usually not faster.

than regular MMX/SSE (e.g. Core1)

Definition at line 39 of file cpu.h.


#define AV_CPU_FLAG_SSSE3   0x0080

Conroe SSSE3 functions.

Definition at line 41 of file cpu.h.


#define AV_CPU_FLAG_SSSE3SLOW   0x4000000

SSSE3 supported, but usually not faster.

Definition at line 42 of file cpu.h.


#define AV_CPU_FLAG_ATOM   0x10000000

Atom processor, some SSSE3 instructions are slower.

Definition at line 43 of file cpu.h.


#define AV_CPU_FLAG_SSE4   0x0100

Penryn SSE4.1 functions.

Definition at line 44 of file cpu.h.


#define AV_CPU_FLAG_SSE42   0x0200

Nehalem SSE4.2 functions.

Definition at line 45 of file cpu.h.


#define AV_CPU_FLAG_AESNI   0x80000

Advanced Encryption Standard functions.

Definition at line 46 of file cpu.h.


#define AV_CPU_FLAG_AVX   0x4000

AVX functions: requires OS support even if YMM registers aren't used.

Definition at line 47 of file cpu.h.


#define AV_CPU_FLAG_AVXSLOW   0x8000000

AVX supported, but slow when using YMM registers (e.g. Bulldozer)

Definition at line 48 of file cpu.h.


#define AV_CPU_FLAG_XOP   0x0400

Bulldozer XOP functions.

Definition at line 49 of file cpu.h.


#define AV_CPU_FLAG_FMA4   0x0800

Bulldozer FMA4 functions.

Definition at line 50 of file cpu.h.


#define AV_CPU_FLAG_CMOV   0x1000

supports cmov instruction

Definition at line 51 of file cpu.h.


#define AV_CPU_FLAG_AVX2   0x8000

AVX2 functions: requires OS support even if YMM registers aren't used.

Definition at line 52 of file cpu.h.


#define AV_CPU_FLAG_FMA3   0x10000

Haswell FMA3 functions.

Definition at line 53 of file cpu.h.


#define AV_CPU_FLAG_BMI1   0x20000

Bit Manipulation Instruction Set 1.

Definition at line 54 of file cpu.h.


#define AV_CPU_FLAG_BMI2   0x40000

Bit Manipulation Instruction Set 2.

Definition at line 55 of file cpu.h.


#define AV_CPU_FLAG_AVX512   0x100000

AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.

Definition at line 56 of file cpu.h.


#define AV_CPU_FLAG_AVX512ICL   0x200000


Definition at line 57 of file cpu.h.


#define AV_CPU_FLAG_SLOW_GATHER   0x2000000

CPU has slow gathers.

Definition at line 58 of file cpu.h.


#define AV_CPU_FLAG_ALTIVEC   0x0001


Definition at line 60 of file cpu.h.


#define AV_CPU_FLAG_VSX   0x0002

ISA 2.06.

Definition at line 61 of file cpu.h.


#define AV_CPU_FLAG_POWER8   0x0004

ISA 2.07.

Definition at line 62 of file cpu.h.


#define AV_CPU_FLAG_ARMV5TE   (1 << 0)

Definition at line 64 of file cpu.h.


#define AV_CPU_FLAG_ARMV6   (1 << 1)

Definition at line 65 of file cpu.h.


#define AV_CPU_FLAG_ARMV6T2   (1 << 2)

Definition at line 66 of file cpu.h.


#define AV_CPU_FLAG_VFP   (1 << 3)

Definition at line 67 of file cpu.h.


#define AV_CPU_FLAG_VFPV3   (1 << 4)

Definition at line 68 of file cpu.h.


#define AV_CPU_FLAG_NEON   (1 << 5)

Definition at line 69 of file cpu.h.


#define AV_CPU_FLAG_ARMV8   (1 << 6)

Definition at line 70 of file cpu.h.


#define AV_CPU_FLAG_VFP_VM   (1 << 7)

VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.

Definition at line 71 of file cpu.h.


#define AV_CPU_FLAG_DOTPROD   (1 << 8)

Definition at line 72 of file cpu.h.


#define AV_CPU_FLAG_I8MM   (1 << 9)

Definition at line 73 of file cpu.h.


#define AV_CPU_FLAG_SETEND   (1 <<16)

Definition at line 74 of file cpu.h.


#define AV_CPU_FLAG_MMI   (1 << 0)

Definition at line 76 of file cpu.h.


#define AV_CPU_FLAG_MSA   (1 << 1)

Definition at line 77 of file cpu.h.


#define AV_CPU_FLAG_LSX   (1 << 0)

Definition at line 80 of file cpu.h.


#define AV_CPU_FLAG_LASX   (1 << 1)

Definition at line 81 of file cpu.h.


#define AV_CPU_FLAG_RVI   (1 << 0)

I (full GPR bank)

Definition at line 84 of file cpu.h.


#define AV_CPU_FLAG_RVF   (1 << 1)

F (single precision FP)

Definition at line 85 of file cpu.h.


#define AV_CPU_FLAG_RVD   (1 << 2)

D (double precision FP)

Definition at line 86 of file cpu.h.


#define AV_CPU_FLAG_RVV_I32   (1 << 3)

Vectors of 8/16/32-bit int's *‍/.

Definition at line 87 of file cpu.h.


#define AV_CPU_FLAG_RVV_F32   (1 << 4)

Vectors of float's *‍/.

Definition at line 88 of file cpu.h.


#define AV_CPU_FLAG_RVV_I64   (1 << 5)

Vectors of 64-bit int's *‍/.

Definition at line 89 of file cpu.h.


#define AV_CPU_FLAG_RVV_F64   (1 << 6)

Vectors of double's.

Definition at line 90 of file cpu.h.


#define AV_CPU_FLAG_RVB_BASIC   (1 << 7)

Basic bit-manipulations.

Definition at line 91 of file cpu.h.


#define AV_CPU_FLAG_RVB_ADDR   (1 << 8)

Address bit-manipulations.

Definition at line 92 of file cpu.h.


#define AV_CPU_FLAG_RV_ZVBB   (1 << 9)

Vector basic bit-manipulations.

Definition at line 93 of file cpu.h.


#define AV_CPU_FLAG_RV_MISALIGNED   (1 <<10)

Fast misaligned accesses.

Definition at line 94 of file cpu.h.

Function Documentation

◆ av_get_cpu_flags()

int av_get_cpu_flags ( void  )

Return the flags which specify extensions supported by the CPU.

The returned value is affected by av_force_cpu_flags() if that was used before. So av_get_cpu_flags() can easily be used in an application to detect the enabled cpu flags.

Definition at line 103 of file cpu.c.

Referenced by check_cpu_flag(), D(), davs2_init(), define_8tap_2d_funcs(), ff_aacenc_dsp_init_riscv(), ff_aacenc_dsp_init_x86(), ff_ac3dsp_init_aarch64(), ff_ac3dsp_init_arm(), ff_ac3dsp_init_riscv(), ff_ac3dsp_init_x86(), ff_ac3dsp_set_downmix_x86(), ff_afir_init_riscv(), ff_afir_init_x86(), ff_alacdsp_init_riscv(), ff_alacdsp_init_x86(), ff_anlmdn_init_x86(), ff_atadenoise_init_x86(), ff_audiodsp_init_arm(), ff_audiodsp_init_ppc(), ff_audiodsp_init_riscv(), ff_audiodsp_init_x86(), ff_blend_init_x86(), ff_blockdsp_init_arm(), ff_blockdsp_init_mips(), ff_blockdsp_init_ppc(), ff_blockdsp_init_riscv(), ff_blockdsp_init_x86(), ff_bswapdsp_init_riscv(), ff_bswapdsp_init_x86(), ff_bwdif_init_aarch64(), ff_bwdif_init_x86(), ff_cavsdsp_init_x86(), ff_celt_pvq_init_x86(), ff_cfhddsp_init_x86(), ff_cfhdencdsp_init_x86(), ff_colorspacedsp_x86_init(), ff_convolution_init_x86(), ff_dcadsp_init_x86(), ff_dct_encode_init_x86(), ff_diracdsp_init_x86(), ff_dnxhdenc_init_x86(), ff_dwt_init_x86(), ff_eq_init_x86(), ff_exrdsp_init_riscv(), ff_exrdsp_init_x86(), ff_fdctdsp_init_aarch64(), ff_fdctdsp_init_ppc(), ff_fdctdsp_init_x86(), ff_fixed_dsp_init_riscv(), ff_fixed_dsp_init_x86(), ff_flacdsp_init_riscv(), ff_flacdsp_init_x86(), ff_flacencdsp_init_x86(), ff_float_dsp_init_aarch64(), ff_float_dsp_init_arm(), ff_float_dsp_init_ppc(), ff_float_dsp_init_riscv(), ff_float_dsp_init_x86(), ff_fmt_convert_init_aarch64(), ff_fmt_convert_init_arm(), ff_fmt_convert_init_ppc(), ff_fmt_convert_init_riscv(), ff_fmt_convert_init_x86(), ff_framerate_init_x86(), ff_fspp_init_x86(), ff_g722dsp_init_arm(), ff_g722dsp_init_riscv(), ff_g722dsp_init_x86(), ff_gblur_init_x86(), ff_get_cpu_max_align_aarch64(), ff_get_cpu_max_align_arm(), ff_get_cpu_max_align_loongarch(), ff_get_cpu_max_align_mips(), ff_get_cpu_max_align_ppc(), ff_get_cpu_max_align_x86(), ff_get_unscaled_swscale_aarch64(), ff_get_unscaled_swscale_ppc(), ff_gradfun_init_x86(), ff_h263dsp_init_mips(), ff_h263dsp_init_x86(), ff_h264_pred_init_aarch64(), ff_h264_pred_init_arm(), ff_h264_pred_init_loongarch(), ff_h264_pred_init_mips(), ff_h264chroma_init_aarch64(), ff_h264chroma_init_arm(), ff_h264chroma_init_loongarch(), ff_h264chroma_init_mips(), ff_h264chroma_init_ppc(), ff_h264chroma_init_riscv(), ff_h264chroma_init_x86(), ff_h264dsp_init_aarch64(), ff_h264dsp_init_arm(), ff_h264dsp_init_loongarch(), ff_h264dsp_init_mips(), ff_h264dsp_init_ppc(), ff_h264dsp_init_riscv(), ff_h264dsp_init_x86(), ff_h264qpel_init_aarch64(), ff_h264qpel_init_arm(), ff_h264qpel_init_loongarch(), ff_h264qpel_init_mips(), ff_h264qpel_init_ppc(), ff_h264qpel_init_x86(), ff_hevc_dsp_init_aarch64(), ff_hevc_dsp_init_arm(), ff_hevc_dsp_init_loongarch(), ff_hevc_dsp_init_mips(), ff_hevc_dsp_init_ppc(), ff_hevc_dsp_init_x86(), ff_hevc_pred_init_mips(), ff_hflip_init_x86(), ff_hpeldsp_init_aarch64(), ff_hpeldsp_init_arm(), ff_hpeldsp_init_loongarch(), ff_hpeldsp_init_mips(), ff_hpeldsp_init_ppc(), ff_hpeldsp_init_x86(), ff_huffyuvdsp_init_riscv(), ff_huffyuvdsp_init_x86(), ff_huffyuvencdsp_init_x86(), ff_idctdsp_init_aarch64(), ff_idctdsp_init_arm(), ff_idctdsp_init_loongarch(), ff_idctdsp_init_mips(), ff_idctdsp_init_ppc(), ff_idctdsp_init_riscv(), ff_idctdsp_init_x86(), ff_idet_init_x86(), ff_image_copy_plane_uc_from_x86(), ff_init_lls_x86(), ff_jpeg2000dsp_init_riscv(), ff_jpeg2000dsp_init_x86(), ff_limiter_init_x86(), ff_llauddsp_init_arm(), ff_llauddsp_init_ppc(), ff_llauddsp_init_riscv(), ff_llauddsp_init_x86(), ff_llviddsp_init_ppc(), ff_llviddsp_init_riscv(), ff_llviddsp_init_x86(), ff_llvidencdsp_init_riscv(), ff_llvidencdsp_init_x86(), ff_lpc_init_riscv(), ff_lpc_init_x86(), ff_lut3d_init_x86(), ff_maskedclamp_init_x86(), ff_maskedmerge_init_x86(), ff_me_cmp_init_aarch64(), ff_me_cmp_init_arm(), ff_me_cmp_init_mips(), ff_me_cmp_init_ppc(), ff_me_cmp_init_riscv(), ff_mlpdsp_init_arm(), ff_mlpdsp_init_x86(), ff_mpadsp_init_aarch64(), ff_mpadsp_init_arm(), ff_mpadsp_init_ppc(), ff_mpadsp_init_x86(), ff_mpeg4videodsp_init_ppc(), ff_mpeg4videodsp_init_x86(), ff_mpegvideoencdsp_init_arm(), ff_mpegvideoencdsp_init_mips(), ff_mpegvideoencdsp_init_ppc(), ff_mpegvideoencdsp_init_x86(), ff_mpv_common_init_arm(), ff_mpv_common_init_mips(), ff_mpv_common_init_neon(), ff_mpv_common_init_ppc(), ff_mpv_common_init_x86(), ff_nlmeans_init_aarch64(), ff_nlmeans_init_x86(), ff_noise_init_x86(), ff_opus_dsp_init_aarch64(), ff_opus_dsp_init_riscv(), ff_opus_dsp_init_x86(), ff_overlay_init_x86(), ff_pixblockdsp_init_aarch64(), ff_pixblockdsp_init_arm(), ff_pixblockdsp_init_mips(), ff_pixblockdsp_init_ppc(), ff_pixblockdsp_init_riscv(), ff_pixblockdsp_init_x86(), ff_pixelutils_sad_init_x86(), ff_pngdsp_init_x86(), ff_pp7_init_x86(), ff_proresdsp_init_x86(), ff_psdsp_init_aarch64(), ff_psdsp_init_arm(), ff_psdsp_init_riscv(), ff_psdsp_init_x86(), ff_psnr_init_x86(), ff_pullup_init_x86(), ff_qpeldsp_init_mips(), ff_qpeldsp_init_x86(), ff_removegrain_init_x86(), ff_rv34dsp_init_arm(), ff_rv34dsp_init_riscv(), ff_rv34dsp_init_x86(), ff_rv40dsp_init_aarch64(), ff_rv40dsp_init_arm(), ff_rv40dsp_init_riscv(), ff_rv40dsp_init_x86(), ff_sbcdsp_init_arm(), ff_sbcdsp_init_x86(), ff_sbrdsp_init_aarch64(), ff_sbrdsp_init_arm(), ff_sbrdsp_init_riscv(), ff_sbrdsp_init_x86(), ff_scene_sad_get_fn_x86(), ff_showcqt_init_x86(), ff_shuffle_filter_coefficients(), ff_sobel_init_x86(), ff_spatial_idwt_init_x86(), ff_spp_init_x86(), ff_ssim_init_x86(), ff_stereo3d_init_x86(), ff_svq1enc_init_ppc(), ff_svq1enc_init_riscv(), ff_svq1enc_init_x86(), ff_sws_init_range_convert_loongarch(), ff_sws_init_swscale_aarch64(), ff_sws_init_swscale_arm(), ff_sws_init_swscale_loongarch(), ff_sws_init_swscale_ppc(), ff_sws_init_swscale_vsx(), ff_sws_init_swscale_x86(), ff_synth_filter_init_aarch64(), ff_synth_filter_init_arm(), ff_synth_filter_init_x86(), ff_takdsp_init_riscv(), ff_takdsp_init_x86(), ff_threshold_init_x86(), ff_tinterlace_init_x86(), ff_transpose_init_x86(), ff_ttadsp_init_x86(), ff_ttaencdsp_init_x86(), ff_tx_decompose_length(), ff_tx_init_subtx(), ff_utvideodsp_init_riscv(), ff_utvideodsp_init_x86(), ff_v210_x86_init(), ff_v210enc_init_x86(), ff_v360_init_x86(), ff_vc1dsp_init_aarch64(), ff_vc1dsp_init_arm(), ff_vc1dsp_init_loongarch(), ff_vc1dsp_init_mips(), ff_vc1dsp_init_ppc(), ff_vc1dsp_init_riscv(), ff_vc1dsp_init_x86(), ff_videodsp_init_aarch64(), ff_videodsp_init_arm(), ff_videodsp_init_mips(), ff_videodsp_init_x86(), ff_volume_init_x86(), ff_vorbisdsp_init_aarch64(), ff_vorbisdsp_init_arm(), ff_vorbisdsp_init_ppc(), ff_vorbisdsp_init_riscv(), ff_vorbisdsp_init_x86(), ff_vp3dsp_init_arm(), ff_vp3dsp_init_mips(), ff_vp3dsp_init_ppc(), ff_vp3dsp_init_x86(), ff_vp6dsp_init_arm(), ff_vp6dsp_init_x86(), ff_vp78dsp_init_aarch64(), ff_vp78dsp_init_arm(), ff_vp78dsp_init_ppc(), ff_vp78dsp_init_riscv(), ff_vp78dsp_init_x86(), ff_vp8dsp_init_aarch64(), ff_vp8dsp_init_arm(), ff_vp8dsp_init_loongarch(), ff_vp8dsp_init_mips(), ff_vp8dsp_init_riscv(), ff_vp8dsp_init_x86(), ff_vp9dsp_init_16bpp_x86(), ff_vp9dsp_init_loongarch(), ff_vp9dsp_init_mips(), ff_vp9dsp_init_x86(), ff_vvc_dsp_init_x86(), ff_w3fdif_init_x86(), ff_wmv2dsp_init_mips(), ff_xvid_idct_init_mips(), ff_xvid_idct_init_x86(), ff_yadif_init_x86(), ff_yuv2rgb_init_loongarch(), ff_yuv2rgb_init_ppc(), ff_yuv2rgb_init_tables_ppc(), ff_yuv2rgb_init_x86(), INIT_FUNC(), lf_mix_fns(), main(), opt_cpuflags(), pp_get_context(), PRED4x4(), rgb2rgb_init_aarch64(), rgb2rgb_init_loongarch(), rgb2rgb_init_riscv(), rgb2rgb_init_x86(), swri_audio_convert_init_aarch64(), swri_audio_convert_init_arm(), swri_audio_convert_init_x86(), swri_resample_dsp_aarch64_init(), swri_resample_dsp_arm_init(), swri_resample_dsp_x86_init(), sws_init_single_context(), swscale(), thread_main(), vp9dsp_intrapred_init_riscv(), vp9dsp_itxfm_init_aarch64(), vp9dsp_itxfm_init_arm(), vp9dsp_loopfilter_init_aarch64(), vp9dsp_loopfilter_init_arm(), and vp9dsp_mc_init_riscv().

◆ av_force_cpu_flags()

void av_force_cpu_flags ( int  flags)

Disables cpu detection and forces the specified flags.

-1 is a special case that disables forcing of specific flags.

Definition at line 75 of file cpu.c.

Referenced by check_cpu_flag(), LLVMFuzzerTestOneInput(), main(), and opt_cpuflags().

◆ av_parse_cpu_caps()

int av_parse_cpu_caps ( unsigned *  flags,
const char *  s 

Parse CPU caps from a string and update the given AV_CPU_* flags based on that.

negative on error.

Definition at line 113 of file cpu.c.

Referenced by main(), and opt_cpuflags().

◆ av_cpu_count()

int av_cpu_count ( void  )

◆ av_cpu_force_count()

void av_cpu_force_count ( int  count)

Overrides cpu count detection and forces the specified count.

Count < 1 disables forcing of specific count.

Definition at line 265 of file cpu.c.

Referenced by opt_cpucount().

◆ av_cpu_max_align()

size_t av_cpu_max_align ( void  )

Get the maximum data alignment that may be required by FFmpeg.

Note that this is affected by the build configuration and the CPU flags mask, so e.g. if the CPU supports AVX, but libavutil has been built with –disable-avx or the AV_CPU_FLAG_AVX flag has been disabled through av_set_cpu_flags_mask(), then this function will behave as if AVX is not present.

Definition at line 270 of file cpu.c.

Referenced by config_eq_output(), config_input(), config_output(), config_props(), ff_default_get_audio_buffer(), ff_default_get_video_buffer(), init_segment(), magy_encode_init(), predict_slice(), and sq_frame_samples().